MCM69T618 Datasheet, Motorola

— — 45 mA 1 VOL VOH — 2.4 — — 0.4 — V V CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested) Parameter Input Capacit.

Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the ove.

Pin Locations 42 8, 9, 12, 13, 18, 19, 22, 23, 24, 58, 59, 62, 63, 68, 69, 72, 73, 74 86 Symbol DE DQ1
  – DQ18 Type Input I/O Description Data Enable Input: Latched on the rising clock edge, active low. The data input register is only.