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MPC2003 - 256KB and 512KB BurstRAM

Download the MPC2003 datasheet PDF. This datasheet also covers the MPC2002 variant, as both devices belong to the same 256kb and 512kb burstram family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (MPC2002_Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2002/D 256KB and 512KB BurstRAM™ Secondary Cache Module for PowerPC™ – Based Systems The MPC2002SG and MPC2003SG are designed to provide a burstable, high performance, 256K/512K L2 cache for the PowerPC 60x processors. The modules are configured as 32K x 72 and 64K x 72 bits in a 136 pin dual readout single inline memory module (DIMM). The module uses four of Motorola’s MCM67M518 or MCM67M618 BiCMOS BurstRAMs. Bursts can be initiated with either transfer start processor (TSP) or transfer start controller (TSC). Subsequent burst addresses are generated internal to the BurstRAM by the burst address advance (BAA) pin. Write cycles are internally self timed and are initiated by the rising edge of the clock (K) input.
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