MPC563
Overview
- High performance CPU system - High performance core
- Single issue integer core
- Compatible with PowerPC instruction set architecture
- Precise exception model
- Floating point
- Extensive system development support - On-chip watchpoints and breakpoints - Program flow tracking - Background debug mode (BDM) - IEEE-ISTO Nexus 5001-1999 Class 3 Debug Interface - MPC500 system interface (USIU, BBC, L2U) - Fully static design - Four major power saving modes
- On, doze, sleep, deep-sleep and power-down - 32-Kbyte static RAM (CALRAM) - 512-Kbyte flash (UC3F) on MPC563/MPC564 - General-purpose I/O support
- On address (24) and data (32) pins
- 16 GPIO in MIOS14
- Many peripheral pins can be used as GPIO when not used as primary functions
