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Motorola Electronic Components Datasheet

MTB23P06V Datasheet

TMOS POWER FET

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB23P06V/D
Designer's Data Sheet
TMOS V
Power Field Effect Transistor
D2PAK for Surface Mount
P–Channel Enhancement–Mode Silicon Gate
TMOS V is a new technology designed to achieve an on–resis-
tance area product about one–half that of standard MOSFETs. This
new technology more than doubles the present cell density of our
50 and 60 volt TMOS devices. Just as with our TMOS E–FET
designs, TMOS V is designed to withstand high energy in the
avalanche and commutation modes. Designed for low voltage, high
speed switching applications in power supplies, converters and
power motor controls, these devices are particularly well suited for
bridge circuits where diode speed and commutating safe operating
areas are critical and offer additional safety margin against
unexpected voltage transients.
MTB23P06V
Motorola Preferred Device
TMOS POWER FET
23 AMPERES
60 VOLTS
RDS(on) = 0.120 OHM
TM
D
New Features of TMOS V
On–resistance Area Product about One–half that of Standard
MOSFETs with New Low Voltage, Low RDS(on) Technology
Faster Switching than E–FET Predecessors
G
Features Common to TMOS V and TMOS E–FETS
Avalanche Energy Specified
IDSS and VDS(on) Specified at Elevated Temperature
Static Parameters are the Same for both TMOS V and TMOS E–FET
Surface Mount Package Available in 16 mm 13–inch/2500 Unit Tape & Reel,
Add T4 Suffix to Part Number
S
CASE 418B–02, Style 2
D2PAK
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
60
Vdc
Drain–to–Gate Voltage (RGS = 1.0 M)
VDGR
60
Vdc
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage — Non–repetitive (tp 10 ms)
VGS
VGSM
± 15
± 25
Vdc
Vpk
Drain Current — Continuous @ 25°C
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp 10 µs)
ID 23 Adc
ID 15
IDM 81 Apk
Total Power Dissipation @ 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
PD 90 Watts
0.60 W/°C
3.0
Operating and Storage Temperature Range
TJ, Tstg – 55 to 175
°C
Single Pulse Drain–to–Source Avalanche Energy — STARTING TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, PEAK IL = 23 Apk, L = 3.0 mH, RG = 25 )
EAS
794
mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
RθJC 1.67 °C/W
RθJA
62.5
RθJA
50
Maximum Lead Temperature for Soldering Purposes, 1/8from Case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
TL 260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET, Designer’s and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
© MMoototororloa,laIncT.M19O96S Power MOSFET Transistor Device Data
1


Motorola Electronic Components Datasheet

MTB23P06V Datasheet

TMOS POWER FET

No Preview Available !

MTB23P06V
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
60 — — Vdc
— 60.5 — mV/°C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
Gate–Body Leakage Current (VGS = ± 15 Vdc, VDS = 0 Vdc)
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
IDSS
IGSS
µAdc
— — 10
— — 100
— — 100 nAdc
VGS(th)
2.0 2.8 4.0 Vdc
— 5.3 — mV/°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 11.5 Adc)
Drain–Source On–Voltage
(VGS = 10 Vdc, ID = 23 Adc)
(VGS = 10 Vdc, ID = 11.5 Adc, TJ = 150°C)
Forward Transconductance
(VDS = 10.9 Vdc, ID = 11.5 Adc)
RDS(on)
VDS(on)
gFS
— 0.093 0.12 Ohm
Vdc
— 2.1 3.3
— — 3.2
5.0 11.5
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
(VDD = 30 Vdc, ID = 23 Adc,
VGS = 10 Vdc,
RG = 9.1 )
(VDS = 48 Vdc, ID = 23 Adc,
VGS = 10 Vdc)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 23 Adc, VGS = 0 Vdc)
(IS = 23 Adc, VGS = 0 Vdc, TJ = 150°C)
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QT
Q1
Q2
Q3
VSD
1160
1620
pF
— 380 530
— 105 210
— 13.8 30
ns
— 98.3 200
— 41 80
— 62 120
— 38 50 nC
— 7.0 —
— 18 —
— 14 —
Vdc
— 2.2 3.5
— 1.8 —
Reverse Recovery Time
Reverse Recovery Stored Charge
(IS = 23 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
trr
ta
tb
QRR
— 142 —
— 100 —
— 41 —
— 0.804 —
ns
µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25from package to center of die)
LD nH
— 3.5 —
4.5
Internal Source Inductance
(Measured from the source lead 0.25from package to source bond pad)
LS
— 7.5 — nH
(1) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.
(2) Switching characteristics are independent of operating junction temperature.
2 Motorola TMOS Power MOSFET Transistor Device Data


Part Number MTB23P06V
Description TMOS POWER FET
Maker Motorola
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MTB23P06V Datasheet PDF






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