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Motorola Electronic Components Datasheet

MTB55N06Z Datasheet

TMOS POWER FET

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
TMOS E-FET.
High Energy Power FET
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications in power supplies, PWM motor controls and
other inductive loads, the avalanche energy capability is specified
to eliminate the guesswork in designs where inductive loads are
switched and offer additional safety margin against unexpected
voltage transients.
Avalanche Energy Capability Specified at Elevated
Temperature
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor–Absorbs High Energy in the
Avalanche Mode
ESD Protected. Designed to Typically Withstand 400 V
Machine Model and 4000 V Human Body Model.
G
Order this document
by MTB55N06Z/D
MTB55N06Z
TMOS POWER FET
55 AMPERES
60 VOLTS
RDS(on) = 18 m
D
CASE 418B–02, Style 2
D2PAK
S
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Drain–to–Gate Voltage (RGS = 1.0 M)
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage — Non–Repetitive (tp 10 ms)
Drain Current — Continuous @ TC = 25°C
Drain Current — Continuous @ TC = 100°C
Drain Current — Single Pulse (tp 10 µs)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VDS = 60 Vdc, VGS = 10 Vdc, Peak IL = 55 Apk, L = 0.3 mH, RG = 25 )
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
Value
60
60
± 20
± 40
55
35.5
165
113
0.91
2.5
– 55 to 150
454
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
°C
mJ
RθJC
RθJC
RθJA
TL
1.1 °C/W
62.5
50
260 °C
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
REV 1
© MMoototororloa,laIncT.M19O97S Power MOSFET Transistor Device Data
1


Motorola Electronic Components Datasheet

MTB55N06Z Datasheet

TMOS POWER FET

No Preview Available !

MTB55N06Z
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
(Cpk 2.0)
V(BR)DSS
Vdc
60 — —
— 53 — mV/°C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc)
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
(Cpk 2.0)
IDSS
IGSS
µAdc
— — 1.0
— — 10
— — 100 nAdc
VGS(th)
Vdc
2.0 3.0 4.0
— 6.0 — mV/°C
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 27.5 Adc)
(Cpk 2.0)
Drain–to–Source On–Voltage (VGS = 10 Vdc)
(ID = 55 Adc)
(ID = 27.5 Adc, TJ = 125°C)
Forward Transconductance (VDS = 4.0 Vdc, ID = 27.5 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
(VDD = 30 Vdc, ID = 55 Adc,
VGS(on) = 10 Vdc,
RG = 9.1 )
(VDS = 48 Vdc, ID = 55 Adc,
VGS = 10 Vdc)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 55 Adc, VGS = 0 Vdc)
(IS = 55 Adc, VGS = 0 Vdc, TJ = 125°C)
RDS(on)
VDS(on)
gFS
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QT
Q1
Q2
Q3
VSD
m
— 14 18
Vdc
0.825
1.2
— 0.74 1.0
12 15 — Mhos
1390
1950
pF
— 520 730
— 119 238
— 27 54 ns
— 157 314
— 116 232
— 126 252
— 40 56 nC
— 7.0 —
— 18 —
— 15 —
Vdc
— 0.93 1.1
— 0.82 —
Reverse Recovery Time
Reverse Recovery Stored Charge
(IS = 55 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
trr
ta
tb
QRR
— 57 —
— 32 —
— 25 —
— 0.11 —
ns
µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from drain lead 0.25from package to center of die)
LD nH
— 3.5 —
— 4.5 —
Internal Source Inductance
(Measured from the source lead 0.25from package to source bond pad)
LS
— 7.5 —
(1) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.
(2) Switching characteristics are independent of operating junction temperature.
2 Motorola TMOS Power MOSFET Transistor Device Data


Part Number MTB55N06Z
Description TMOS POWER FET
Maker Motorola
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