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Motorola Electronic Components Datasheet

MTB60N06HD Datasheet

TMOS POWER FET

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB60N06HD/D
Designer's Data Sheet
HDTMOS E-FET.
High Energy Power FET
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This advanced
high–cell density HDTMOS power FET is designed to withstand
high energy in the avalanche and commutation modes. This new
energy efficient design also offers a drain–to–source diode with a
fast recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
Short Heatsink Tab Manufactured — Not Sheared
Specially Designed Leadframe for Maximum Power Dissipation
Available in 24 mm 13–inch/800 Unit Tape & Reel, Add T4
Suffix to Part Number
G
MTB60N06HD
Motorola Preferred Device
TMOS POWER FET
60 AMPERES
60 VOLTS
RDS(on) = 0.014 OHM
D
CASE 418B–02, Style 2
D2PAK
S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 M)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp 10 ms)
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp 10 µs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 60 Apk, L = 0.3 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds
(1) When mounted with the minimum recommended pad size.
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
RθJC
RθJA
RθJA
TL
60
60
± 20
± 30
60
42.3
180
125
1.0
2.5
– 55 to 150
540
1.0
62.5
50
260
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET, Designer’s and HDTMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
© MMoototroorlao,lIancT. 1M99O5S Power MOSFET Transistor Device Data
1


Motorola Electronic Components Datasheet

MTB60N06HD Datasheet

TMOS POWER FET

No Preview Available !

MTB60N06HD
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
(Cpk 2.0) (3) V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current
(VGS = ± 20 Vdc, VDS = 0 Vdc)
IDSS
IGSS
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
(Cpk 3.0) (3)
VGS(th)
Static Drain–Source On–Resistance
(VGS = 10 Vdc, ID = 30 Adc)
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 60 Adc)
(ID = 30 Adc, TJ =125°C)
Forward Transconductance
(VDS = 4.0 Vdc, ID = 30 Adc)
(Cpk 3.0) (3)
RDS(on)
VDS(on)
gFS
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
(VDD= 30 Vdc, ID = 60 Adc,
VGS = 10 Vdc,
RG = 9.1 )
(VDS = 48 Vdc, ID = 60 Adc,
VGS = 10 Vdc)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 60 Adc, VGS = 0 Vdc)
(IS = 60 Adc, VGS = 0 Vdc, TJ = 125°C)
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QT
Q1
Q2
Q3
VSD
Reverse Recovery Time
(See Figure 15)
(IS = 60 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
Reverse Recovery Stored Charge
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25from package to source bond pad)
(1) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values.
Max limit – Typ
Cpk = 3 x SIGMA
trr
ta
tb
QRR
LD
LS
Min
60
2.0
15
Typ Max Unit
Vdc
——
71 — mV/°C
µAdc
— 10
— 100
nAdc
— 100
3.0
7.0
0.011
20
4.0
0.014
1.0
0.9
Vdc
mV/°C
Ohm
Vdc
mhos
1950
660
147
2800
920
300
pF
14 26
197 394
50 102
124 246
51 71
12 —
24 —
21 —
ns
nC
0.99
0.89
60
36
24
0.143
1.0
Vdc
ns
µC
4.5 — nH
7.5 — nH
2 Motorola TMOS Power MOSFET Transistor Device Data


Part Number MTB60N06HD
Description TMOS POWER FET
Maker Motorola
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MTB60N06HD Datasheet PDF






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