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MTD6N15 - Power MOSFET

Features

  • Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows: PD = TJ(max).
  • TA RθJA dissipation can be increased. Although one can almost double the power dissipation with this method, one will be giving up area on the printed circuit board which can.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA www.DataSheet4U.com Order this document by MTD6N15/D Designer's Power Field Effect Transistor DPAK for Surface Mount N–Channel Enhancement–Mode Silicon Gate This TMOS Power FET is designed for high speed, low loss power switching applications such as switching regulators, converters, solenoid and relay drivers. Silicon Gate for Fast Switching Speeds Low RDS(on) — 0.3 Ω Max Rugged — SOA is Power Dissipation Limited Source–to–Drain Diode Characterized for Use With Inductive Loads • Low Drive Requirement — VGS(th) = 4.0 V Max • Surface Mount Package on 16 mm Tape • • • • ™ Data Sheet MTD6N15 TMOS POWER FET 6.0 AMPERES 150 VOLTS RDS(on) = 0.3 OHM ® D G S Rating Drain–Source Voltage Drain–Gate Voltage (RGS = 1.
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