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D4701A - UPD4701A

Description

The µPD4701A is a counter for an X, Y 2-axis incremental encoder.

When a two-phase encoder signal is input for the X and Y axes, direction discrimination and computation is performed, and count data is output in 8-bit parallel form.

Features

  • X, Y 2-axis incremental encoder counter.
  • Counter input (Schmitt-triggered input) X axis: XA, XB 2-phase signal   4-multiplication count method used Y axis: YA, YB 2-phase signal .
  • Counters: 12-bit binary up/down counters (2 sets, X & Y) Reset value: 000H.
  • Count data output: 8-bit parallel latch output × 2 (including key input flag).
  • On-chip 3-contact-point key input buffer circuit.
  • CMOS.
  • Single +5 V power supply PIN.

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Datasheet Details

Part number D4701A
Manufacturer NEC
File Size 95.46 KB
Description UPD4701A
Datasheet download datasheet D4701A Datasheet

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Full PDF Text Transcription

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DATA SHEET MOS INTEGRATED CIRCUIT µPD4701A INCREMENTAL ENCODER COUNTER DESCRIPTION The µPD4701A is a counter for an X, Y 2-axis incremental encoder. When a two-phase encoder signal is input for the X and Y axes, direction discrimination and computation is performed, and count data is output in 8-bit parallel form. In addition, a 3-contact-point input buffer is incorporated, which is useful for applications which use a pointing device such as a mouse or track-ball. The CPU checks the switch input flag or count flag and reads the 12-bit count data in two operations, one for the lower byte and one for the upper byte. The key input flag is output together with the count data in the upper byte.
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