64-/32-bit microprocessor.
* Employs 64-bit MIPS architecture
* Conforms to MIPS III instruction set (deleting FPU, LL, LLD, SC, and SCD instructions)
* Optimized 6-stage pipeline
*.
* Battery-driven portable information systems
* Embedded controllers, etc.
ORDERING INFORMATION
Part Number Pac.
are provided in the following user’s manual. Be sure to read it before designing.
* VR4121 User’s Manual (U13569E)
DESCRIPTION
FEATURES
* Employs 64-bit MIPS architecture
* Conforms to MIPS III instruction set (deleting FPU, LL, LLD, S.
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