UPD411-1 - FULLY DECODED RANDOM ACCESS MEMORY

NEC

Download the UPD411-1 datasheet PDF. This datasheet also covers the UPD411 variant, as both devices belong to the same fully decoded random access memory family and are provided as variant models within a single manufacturer datasheet.

Key Features

of the fJPD411 family are:.
Low Standby Power.
4096 words x 1 bit Organization.
A single low-capacitance high level clock input with solid ±.

📥 Download Datasheet

UPD411-1 fully decoded random access memory by NEC - Datasheet Preview — Note: The manufacturer provides a single datasheet file (UPD411-NEC.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number	UPD411-1
Manufacturer	NEC
File Size	415.23 KB
Description	FULLY DECODED RANDOM ACCESS MEMORY
Datasheet	UPD411-1 Datasheet

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Other Datasheets by NEC

Part Number	Description
UPD411-2	FULLY DECODED RANDOM ACCESS MEMORY
UPD411-3	FULLY DECODED RANDOM ACCESS MEMORY
UPD411-4	FULLY DECODED RANDOM ACCESS MEMORY
UPD411	FULLY DECODED RANDOM ACCESS MEMORY
UPD411A	4096-BIT DYNAMIC RAMS

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

NEe Microcomputers, Inc. NEe !J PD411 JJ PD411·1 f'PD411·2 ,... PD411·3 flo PD411·4 oESCR I PTION FEATUR ES FULLY DECODED RANDOM ACCESS MEMORY The J,lPD411 Family consists of six 4096 words by 1 bit dynamic N-channel MOS RAMs. They are designed for memory applications where very low cost and large bit storage are important design objectives. The J,lPD411 Family is designed using dynamic circuitry which reduces the standby power dissipation. Reading information from the memory is a non-destructive. Refreshing is easily accomplished by performing one read cycle on each of the 64 row addresses. Each row address must be refreshed every two milliseconds. The memory is refreshed whether Chip Select is a logic high ol'a logic low.