UPD44325184 Datasheet | NEC

.. PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD44325084, 44325094, 44325184, 44325364 36M-BIT QDRTMII SRAM 4-WORD BURST OPERATION Description The µPD44325084 is a 4,194,304-word by 8-bit, the µPD44325094 is a 4,194,304-word by 9-bit, the µPD44325184 is a 2,097,152-word by 18-bit and the µPD44325364 is a 1,048,576-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44325084, µPD44325094, µPD44325184 and µPD44325364 integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and /K. These products are suitable for application which require synchronous operation, high speed, low voltage, high density and wide bit configuration. These products are packaged in 165-pin PLASTIC FBGA. Features - 1.8 ± 0.1 V power supply and HSTL I/O - DLL circuitry for wide output data valid window and future frequency scaling - Separate independent read and write data ports with concurrent transactions - 100% bus utilization DDR READ and WRITE operation - Four-tick burst for reduced address frequency - Two input clocks (K and /K) for precise DDR timing at clock rising edges only - Two output clocks (C and /C) for precise flight time and clock skew matching-clock and data delivered together to receiving device - Internally self-timed write control - Clock-stop capability with µs restart - User programmable impedance output - Fast clock cycle time : 3.3 ns (300 MHz) , 4.0 ns (250 MHz) , 5.0 ns (200 MHz) - Simple control logic for easy depth expansion - JTAG boundary scan The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and...