UPD70741 Description
It incorporates peripheral functions such as a DRAM/ROM controller, 2-channel DMA controller, real-time pulse unit, serial interface, and interrupt controller. The V821, which offers quick real-time response, high-speed integer instructions, bit string instructions, and floating-point instructions, is ideally suited to use in OA equipment such as printers and facsimiles, image processing devices such as those used...
UPD70741 Key Features
- Separate address/data bus Address bus : 24 bits Data bus : 16 bits
- Built-in 1-Kbyte instruction cache memory
- Pipeline structure of 1-clock pitch
- Internal 4-Gbyte linear address space
- 32-bit general-purpose registers: 32 Instructions ideal for various application fields
- Floating-point operation instructions and bit string instructions Interrupts controller
- Nonmaskable : 1 external input
- Maskable : 8 external inputs and 11 types of internal sources
- Priorities can be specified in units of four groups. Wait control unit
- Capable of CS control over four blocks in both memory and I/O spaces