Description
BLOCK DIAGRAM
334
"cC'''UST
IV,",fU",BU WOAO LEfIrIGTHI
PIN IDENTIFICATION
PIN
NO.SYMBOL
1
TO
2
XTALI
3
XTAL2
4
RESET
5
SS
6
INT
7
EA
8
RD
9
PSEN
10
WR
11
ALE
12 - 19 DO - D7 BUS
20
21- 24, 35-38
VSS
P20 - P27: PORT 2
25
PROG
26
VDD
27 - 34 39
Pl0 - P17: PORT 1
T1
40
Vce
fL PD8048/8748/8035L
FUNCTION
Testable input using conditional transfer functions JTO and JNTO.The internal State Clock (ClK) is available to TO using the ENTO elK instruction.TO can
Features
- of the J,LPD8048 except the 1024 x 8-bit internal ROM. The external program memory can be implemented using standard 8080A/8085A memory products.