UPD23C64202L
Overview
The µPD23C64202L is a 67,108,864 bits synchronous mask-programmable ROM with multiplexed address bus. The word organization is selectable (WORD mode : 4,194,304 words by 16 bits, DOUBLE WORD mode : 2,097,152 words by 32 bits).
- Fully synchronous mask-ROM; all signals referenced to a positive clock edge
- Word organization : 4,194,304 words by 16 bits (WORD mode) 2,097,152 words by 32 bits (DOUBLE WORD mode)
- Operation frequency : up to 100 MHz Operation supply voltage VCC Clock frequency MHz Access time from CLK ns (MAX.) Operating current (Burst mode) mA (MAX.) 150 Standby current (CMOS level input) µA (MAX.) 100 5
- 3 V ± 0.3 V
