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S7A801830M Datasheet 256kx36 & 512kx18 Sync-pipelined Burst Sram

Manufacturer: NETSOL

Overview: S7A803630M SS77AA880013863300MM S7A801830M 256Kx36 & 512Kx18 Sync-Pipelined Burst SRAM 256Kx36 & 512Kx18 Sync-Pipelined Burst SRAM 9Mb Sync. Pipelined Burst SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.1 Feb. 2017 -1- S7A803630M S7A801830M 256Kx36 & 512Kx18 Sync-Pipelined Burst SRAM Document Title 256Kx36 & 512Kx18 Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History 0.0 Initial Draft 1.0 1. Final Spec Release 2. Insert ICC Parameters 1.1 Add 1.8V VDD operation Draft Date Aug. 2011 Nov. 2011 Remark Preliminary Final Feb. 2017 Final Rev. 1.1 Feb.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • VDD = 1.8V (1.7V ~ 2.0V) or 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
  • VDDQ = 1.7V~2.0V I/O Power Supply (VDD=1.8V) or 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V).
  • Synchronous Operation.
  • 2 Stage Pipelined operation with 4 Burst.
  • On-Chip Address Counter.
  • Self-Timed Write Cycle.
  • On-Chip Address and Control Registers.
  • Byte Writable Function.
  • Global Write Enable Controls a f.

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