74173 3-state equivalent, quad d-type flip-flop; positive-edge trigger; 3-state.
* Gated input enable for hold (do nothing) mode
* Gated output enable control
* Edge-triggered D-type register
* Asynchronous master reset
* Output ca.
The 74HC/HCT173 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT173 are 4-bit parallel load registers with clock enable control, .
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