74ABT273A flip-flop equivalent, octal d-type flip-flop.
* Eight edge-triggered D-type flip-flops
* Buffered common clock
* Buffered asynchronous Master Reset
* Power-up reset
* See 74ABT377 for clock enabl.
where the true output only is required and the CP and MR are common elements.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN.
The 74ABT273A has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. T.
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