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NXP Semiconductors Electronic Components Datasheet

74ABT74 Datasheet

Dual D-type flip-flop

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Philips Semiconductors
Dual D-type flip-flop
Product specification
74ABT74
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
Tamb = 25°C;
GND = 0V
tPLH
tPHL
tOSLH
tOSHL
CIN
Propagation
delay
CPn to
Qn, Qn
Output to
Output skew
Input
capacitance
CL = 50pF;
VCC = 5V
VI = 0V or VCC
ICC
Total supply
current
Outputs disabled;
VCC = 5.5V
TYPICAL UNIT
3.0
2.5
ns
0.5 ns
3 pF
50 µA
PIN CONFIGURATION
DESCRIPTION
The 74ABT74 is a dual positive edge-triggered D-type flip-flop
featuring individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input.
When set and reset are inactive (high), data at the D input is
transferred to the Q and Q outputs on the low-to-high transition of
the clock. Data must be stable just one setup time prior to the
low-to-high transition of the clock for predictable operation. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time
interval, data at the D input may be changed without affecting the
levels of the output.
LOGIC SYMBOL (IEEE/IEC)
RD1 1
D0 2
CP0 3
SD1 4
Q0 5
Q0 6
GND 7
14 VCC
13 RD1
12 D1
11 CP1
10 SD1
9 Q1
8 Q1
SF00045
PIN DESCRIPTION
PIN NUMBER SYMBOL
NAME AND FUNCTION
1, 2, 3, 4, 10,
11, 12, 13
RDn, Dn,
CPn, SDn
Data inputs
5, 6, 8, 9
Qn, Qn Data outputs
7 GND Ground (0V)
14 VCC Positive supply voltage
LOGIC SYMBOL
2 12
4&
S
3
C1
2
1D
1
R
10
S
11
C2
12 2D
13 R
LOGIC DIAGRAM
SD 4, 10
RD 1, 13
3
4
1
11
10
13
VCC = Pin 14
GND = Pin 7
D0 D1
CP0
SD0
RD0
CP1
SD1
RD1
Q0 Q0 Q1 Q1
56 98
SA00359
CP 3, 11
D 2, 12
VCC = Pin 14
GND = Pin 7
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIP
14-Pin plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT74 N
74ABT74 D
74ABT74 DB
74ABT74 PW
NORTH AMERICA
74ABT74 N
74ABT74 D
74ABT74 DB
74ABT74PW DH
5
6
9
8
SF00047
5, 9
Q
6, 8
Q
SF00048
DWG NUMBER
SOT27-1
SOT108-1
SOT337-1
SOT402-1
1995 Sep 22
1 853-1813 15793


NXP Semiconductors Electronic Components Datasheet

74ABT74 Datasheet

Dual D-type flip-flop

No Preview Available !

Philips Semiconductors
Dual D-type flip-flop
Product specification
74ABT74
FUNCTION TABLE
INPUTS
SD RD CP D
LHXX
HLXX
L LXX
HHh
HH
l
HH X
OUTPUTS
QQ
HL
LH
HH
HL
LH
NC NC
OPERATING
MODE
Asynchronous set
Asynchronous
reset
Undetermined*
Load “1”
Load “0”
Hold
NOTES:
H = High voltage level
h = High voltage level one setup time prior to low-to-high
clock transition
L = Low voltage level
l = Low voltage level one setup time prior to low-to-high
clock transition
NC= No change from the previous setup
X = Don’t care
= Low-to-high clock transition
= Not low-to-high clock transition
* = This setup is unstable and will change when either set
or reset return to the high level.
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC DC supply voltage
–0.5 to +7.0
V
IIK DC input diode current
VI DC input voltage3
VI < 0
–18
–1.2 to +7.0
mA
V
IOK DC output diode current
VO < 0
–50 mA
VOUT
DC output voltage3
output in Off or High state
–0.5 to +5.5
V
IOUT
DC output current
output in Low state
40 mA
Tstg Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VIH
VIL
IOH
IOL
t/v
Tamb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
LIMITS
MIN MAX
4.5 5.5
0 VCC
2.0
0.8
–15
20
0 10
–40 +85
UNIT
V
V
V
V
mA
mA
ns/V
°C
1995 Sep 22
2


Part Number 74ABT74
Description Dual D-type flip-flop
Maker NXP
Total Page 5 Pages
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