74AHC273
Key Features
- Ideal buffer for MOS microcontroller or memory
- Common clock and master reset
- ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
- Balanced propagation delays
- All inputs have Schmitt trigger actions
- Inputs accepts voltages higher than VCC
- See ‘377’ for clock enable version
- See ‘373’ for transparent latch version
- See ‘374’ for 3-state version
- For AHC only: operates with CMOS input levels
