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74AHC273 - Octal D-type flip-flop

Description

The 74AHC/AHCT273 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

Features

  • Ideal buffer for MOS microcontroller or memory.
  • Common clock and master reset.
  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
  • Balanced propagation delays.
  • All inputs have Schmitt trigger actions.
  • Inputs accepts voltages higher than VCC.
  • See ‘377’ for clock enable version.
  • See ‘373’ for transparent latch version.
  • See ‘374’ for 3-state versi.

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Datasheet Details

Part number 74AHC273
Manufacturer NXP
File Size 92.82 KB
Description Octal D-type flip-flop
Datasheet download datasheet 74AHC273 Datasheet
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INTEGRATED CIRCUITS DATA SHEET 74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger Product specification File under Integrated Circuits, IC06 1999 Sep 01 Philips Semiconductors Product specification Octal D-type flip-flop with reset; positive-edge trigger FEATURES • Ideal buffer for MOS microcontroller or memory • Common clock and master reset • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt trigger actions • Inputs accepts voltages higher than VCC • See ‘377’ for clock enable version • See ‘373’ for transparent latch version • See ‘374’ for 3-state version • For AHC only: operates with CMOS input levels • For AHCT only: operates with
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