* Wide supply voltage range from 1.65 to 3.6 V
* 3.6 V tolerant inputs/outputs
* CMOS low power consumption
* Direct interface with TTL levels (2.7 to 3.6 V)
* Power-down mode
* Latch-up performance exceeds 250 mA
* Complies with JEDEC standard
74ALVC02
85.00 KB
Quad 2-input nor gate.
INTEGRATED CIRCUITS DATA SHEET 74ALVC02 Quad 2-input NOR gate Product speciļ¬cation Supersedes data of 2003 Feb 05 2003 Jul 14 Philips Semiconductor.
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