74ALVT16823 flip-flop equivalent, 18-bit bus-interface d-type flip-flop.
* Two sets of high speed parallel registers with positive
edge-triggered D-type flip-flops
DESCRIPTION
The 74ALVT16823 18-bit bus interface register is designed to .
The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. The 74ALVT16823 has two 9-bit wide buf.
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