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74ALVT16823 Datasheet PDF

Nexperia 74ALVT16823

The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable. The device can be used as two 9-bit flip-flops or one 18-bit flip-flop. The device features clock (nCP), clock enable (nCE), master reset (nMR) and output enable (nOE, inputs each controlling 9-bits.
Part No. 74ALVT16823
Datasheet 74ALVT16823 Download
Manufacturer
Nexperia
Description 18-bit bus-interface D-type flip-flop
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74ALVT16823 datasheet page 1 preview

FEATURES AND BENEFITS

● Wide supply voltage range from 2.3 V to 3.6 V
● Overvoltage tolerant inputs to 5.5 V
● BiCMOS high speed and output drive
● Direct interface with TTL levels
● Bus hold on data inputs
● Power-up 3-state
● IOFF circuitry provides partial Power-down mode operation
● Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops
● Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
● Live insertion and extraction permitted
● Power-up reset
● No bus current loading when output is tied to 5 V bus
● Output capability: +64 mA to -32 mA
● Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
● ESD protection:
● MIL STD 883, method 3015: exceeds 2000 V
● MM: exceeds 200 V
● Specified from -40 °C to 85 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74ALVT16823DGG -40 °C to +85 °C Name TSSOP56

DESCRIPTION

plastic thin shrink small outline package; 56 leads; body width 6.1 mm Version SOT364-1 Nexperia 74ALVT16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state 4.
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