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74ALVT16823 - 18-bit bus-interface D-type flip-flop

General Description

The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable.

The device can be used as two 9-bit flip-flops or one 18-bit flip-flop.

Key Features

  • Wide supply voltage range from 2.3 V to 3.6 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • BiCMOS high speed and output drive.
  • Direct interface with TTL levels.
  • Bus hold on data inputs.
  • Power-up 3-state.
  • IOFF circuitry provides partial Power-down mode operation.
  • Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops.
  • Ideal where high speed, light loading, or increased fan-in are required.

📥 Download Datasheet

Datasheet Details

Part number 74ALVT16823
Manufacturer Nexperia
File Size 258.77 KB
Description 18-bit bus-interface D-type flip-flop
Datasheet download datasheet 74ALVT16823 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74ALVT16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Rev. 6 — 20 October 2020 Product data sheet 1. General description The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable. The device can be used as two 9-bit flip-flops or one 18-bit flip-flop. The device features clock (nCP), clock enable (nCE), master reset (nMR) and output enable (nOE, inputs each controlling 9-bits. When nCE is LOW, the flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops.