74ALVT16821 Overview
The 74ALVT16821 high-performance BiCMOS device bines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5V or 3.3V with I/O patibility to 5V. The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer.
74ALVT16821 Key Features
- 20-bit positive-edge triggered register
- 5V I/O patible
- Multiple VCC and GND pins minimize switching noise
- Live insertion/extraction permitted
- Power-up reset
- Power-up 3-State
- Output capability: +64mA/-32mA
- Latch-up protection exceeds 500mA per Jedec Std 17
- ESD protection exceeds 2000V per MIL STD 883 Method 3015
- Bus hold data inputs eliminate the need for external pull-up
