* Wide supply voltage range from 0.8 to 2.7 V
* Performance optimised for VCC = 1.8 V
* High noise immunity
* Complies with JEDEC standard:
 &nbs.

using Ioff. The Ioff circuitry disables the output, preventing the damaging current backflow through the device when it .

74AUC1G08 The 74AUC1G08 is a high-performance, low-power, low-voltage, Si-gate CMOS device. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down a.

74AUC1G08GV

74AUC1G08

74AUC1G00

74AUC1G00GV

74AUC1G00GW

74AUC1G02

74AUC1G02GV

74AUC1G02GW

74AUP1G00

74AUP1G00-Q100

74AUP1G02

74AUP1G02-Q100

74AUP1G04