74AUP2G80 Datasheet Low-power dual D-type flip-flop

Manufacturer: NXP Semiconductors

Datasheet Details

Part number	74AUP2G80
Manufacturer	NXP Semiconductors
File Size	120.50 KB
Description	Low-power dual D-type flip-flop
Download	74AUP2G80 Download (PDF)

The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

www.DataSheet4U.com 74AUP2G80 Low-power dual D-type ﬂip-ﬂop; positive-edge trigger Rev.

01 — 25 August 2006 Product data sheet 1.

s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D Class 3A exceeds 5000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 µA (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accep.

Brand Logo	Part Number	Description	Manufacturer
	74AUP2G80	Low-power dual D-type flip-flop	nexperia

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