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NXP Semiconductors Electronic Components Datasheet

74HC165 Datasheet

8-bit parallel-in/serial out shift register

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74HC165; 74HCT165
8-bit parallel-in/serial out shift register
Rev. 03 — 14 March 2008
Product data sheet
1. General description
The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with
JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC165; 74HCT165 are 8-bit parallel-load or serial-in shift registers with
complementary serial outputs (Q7 and Q7) available from the last stage. When the
parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the
register asynchronously.
When PL is HIGH, data enters the register serially at the DS input and shifts one place to
the right (Q0 Q1 Q2, etc.) with each positive-going clock transition. This feature
allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the
succeeding stage.
The clock input is a gated-OR structure which allows one input to be used as an active
LOW clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary
and can be reversed for layout convenience. The LOW-to-HIGH transition of input CE
should only take place while CP HIGH for predictable operation. Either the CP or the CE
should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data
when PL is activated.
2. Features
I Asynchronous 8-bit parallel load
I Synchronous serial input
I Complies with JEDEC standard no. 7A
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Applications
I Parallel-to-serial data conversion


NXP Semiconductors Electronic Components Datasheet

74HC165 Datasheet

8-bit parallel-in/serial out shift register

No Preview Available !

NXP Semiconductors
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74HC165N 40 °C to +125 °C DIP16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
74HCT165N
74HC165D 40 °C to +125 °C SO16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT165D
74HC165DB 40 °C to +125 °C SSOP16
74HCT165DB
plastic shrink small outline package; 16 leads; body width SOT338-1
5.3 mm
74HC165PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body
74HCT165PW
width 4.4 mm
SOT403-1
74HC165BQ 40 °C to +125 °C
74HCT165BQ
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1
quad flat package; no leads; 16 terminals; body
2.5 × 3.5 × 0.85 mm
5. Functional diagram
10
DS
11 D0
12 D1
13 D2
14 D3
3 D4
4 D5
5
D6
Q7
6
D7
Q7
1
PL
9
7
CP CE
2 15
mna985
Fig 1. Logic symbol
SRG8
1 C2[LOAD]
G1[SHIFT]
15 1
2 1 C3/
10
3D
11
2D
12
2D
13
14
3
4
5
6
mna986
Fig 2. IEC logic symbol
9
7
74HC_HCT165_3
Product data sheet
Rev. 03 — 14 March 2008
© NXP B.V. 2008. All rights reserved.
2 of 22


Part Number 74HC165
Description 8-bit parallel-in/serial out shift register
Maker NXP
Total Page 22 Pages
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