74HC160 Datasheet PDF - nexperia Presettable synchronous BCD decade counter Specs

74HC160 - Presettable synchronous BCD decade counter

Datasheet Summary

Description

The 74HC160 is a synchronous presettable decade counter with an internal look-ahead carry.

Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP).

The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW.

Features

Complies with JEDEC standard no. 7A.
CMOS input levels.
Synchronous counting and loading.
2 count enable inputs for n-bit cascading.
Asynchronous reset.
Positive-edge triggered clock.
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-A exceeds 200 V.
Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature r.

Datasheet Details

Part number	74HC160
Manufacturer	nexperia
File Size	245.26 KB
Description	Presettable synchronous BCD decade counter
Datasheet	74HC160 Datasheet
Additional preview pages of the 74HC160 datasheet.

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Full PDF Text Transcription

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74HC160 Presettable synchronous BCD decade counter; asynchronous reset Rev. 4 — 27 March 2019 Product data sheet 1. General description The 74HC160 is a synchronous presettable decade counter with an internal look-ahead carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET).

Published: Jul 23, 2019 |