74LVC2245A Datasheet | NXP Semiconductors

FEATURES - 5 V tolerant inputs/outputs for interfacing with 5 V logic - Wide supply voltage range of 1.2 to 3.6 V - CMOS low power consumption - Direct interface with TTL levels - Integrated 30 Ω termination resistors DESCRIPTION The 74LVC2245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS patible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3 V/5 V environment. The 74LVC2245A is an octal transceiver featuring non-inverting 3-state bus patible outputs in both send and receive directions. The ‘245’ features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control OE controls the outputs so that the buses are effectively isolated. The 74LVC2245A is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise. FUNCTION TABLE See note 1. INPUT OE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE OUTSIDE NORTH AMERICA 74LVC2245AD 74LVC2245ADB 74LVC2245APW NORTH AMERICA 74LVC2245AD 74LVC2245ADB 74LVC2245APW DH TEMPERATURE RANGE - 40 to +85 °C PINS 20 20 20 PACKAGE MATERIAL SO SSOP TSSOP plastic plastic plastic CODE SOT163-1 SOT339-1 SOT360-1 DIR L H X An A=B inputs Z INPUT/OUTPUT Bn inputs B=A Z 1999 Jun 15 Philips Semiconductors Product specification Octal transceiver with direction pin; 30 Ω series termination resistors; 5 V input/output tolerant; 3-state QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL t PHL/t PLH CI CPD Note 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in p F; VCC = supply voltage in V; Σ(CL ×...