74LVC2G126-Q100 Overview
The 74LVC2G126-Q100 is a dual non-inverting buffer/line driver with 3-state outputs. An output enable input (pin nOE) controls each 3-state output. A LOW-level at pin nOE causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G126-Q100 as a translator in a mixed 3.3 V and 5 V environment. It is fully specified for partial power-down
74LVC2G126-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from 40 C to +85 C and from 40 C to +125 C
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant input/output for interfacing with 5 V logic
- High noise immunity
- plies with JEDEC standard
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection
74LVC2G126-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant input/output for interfacing with 5 V logic
