Datasheet Summary
14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications
Rev. 7.1
- 3 August 2015
Product data sheet
1. General description
This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltage operation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling and CMOS select input levels. It is designed for operation in DDR2, DDR3 or DDR4 memory bus systems.
The CBTW28DD14 has a 1 : 2 switch or 2 : 1 multiplex topology and offers a 14-bit wide bus. Each 14-bit wide A-port can be switched to one of two ports B and C, for all bits simultaneously. The selection of the port is by a simple CMOS input (SELect). Another CMOS input (ENable) is available to...