* DSP56652 Features RISC M
* CORE MCU
* 32-bit load/store RISC architecture
* Fixed 16-bit instruction length
* 16-entry 32-bit general-purpose register file
* 32-bit internal address and data buses
* Efficient four-stage, fully interlocked execution pipeline
* Single-cycle
DSP56652
1.11 MB
Integrated cellular baseband processor.
MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order this document by: DSP56652/D Rev 1, 1/99 DSP56652 Advance Information INT.
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