LPC11E66 Overview
The ARM Cortex-M0+ is an easy-to-use, energy-efficient core using a two-stage pipeline and fast single-cycle I/O access. The peripheral plement of the LPC11E6x includes a DMA controller, a CRC engine, two I2C-bus interfaces, up to five USARTs, two SSP interfaces, PWM/timer subsystem with six configurable multi-purpose timers, a Real-Time Clock, one 12-bit ADC, temperature sensor, function-configurable I/O ports, and up to 80 general-purpose I/O pins. For additional documentation related to the LPC11E6x parts, see Section 18 “References”.
LPC11E66 Key Features
- System
- ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz with single-cycle multiplier and fast si
- ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
- AHB Multilayer matrix
- System tick timer
- Serial Wire Debug (SWD) and JTAG boundary scan modes supported
- Micro Trace Buffer (MTB) supported
- Memory
- Up to 256 KB on-chip flash programming memory with page erase
- Up to 32 KB main SRAM