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MC33911 - LIN transceiver

Features

  • The device provides full SPI readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification 2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be disabled for higher data rates. One 50 mA/60 mA high-side switch and two 150 mA/160 mA low-side switches with output protection are available. All outputs can be pulse-width modulated (PWM). Two high-voltage inputs are available for use in contact monitoring, or as external w.

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Full PDF Text Transcription

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NXP Semiconductors Technical Data MC33910G5AC/MC3433910G5AC LIN system basis chip with DC motor pre-driver Document Number: MC33911 Rev. 10.0, 7/2016 33911 The 33911G5/BAC is a SMARTMOS Serial Peripheral Interface (SPI) controlled System Basis Chip (SBC), combining many frequently used functions in an MCU based system, plus a Local Interconnect Network (LIN) transceiver. The 33911 has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting features. The device provides full SPI readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification 2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be disabled for higher data rates.
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