Table of Contents
1 MCF532x Family Comparison . . . . . . . . . . . . . . . . . . . . . . . . .3
2 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3 Hardware Design Considerations . . . . . . . . . . . . . . . . . . . . . . .5
3.1 PLL Power Filtering. . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.2 USB Power Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.3 Supply Voltage Sequencing and Separation Cautions . .5
3.3.1 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . .5
3.3.2 Power Down Sequence . . . . . . . . . . . . . . . . . . . .6
4 Pin Assignments and Reset States . . . . . . . . . . . . . . . . . . . . .6
4.1 Signal Multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4.2 Pinout—256 MAPBGA . . . . . . . . . . . . . . . . . . . . . . . . .14
4.3 Pinout—196 MAPBGA . . . . . . . . . . . . . . . . . . . . . . . . .15
5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
5.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
5.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .17
5.3 ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
5.4 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .18
5.5 Oscillator and PLL Electrical Characteristics . . . . . . . .19
5.6 External Interface Timing Characteristics . . . . . . . . . . .20
5.6.1 FlexBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
5.7 SDRAM Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
5.7.1 SDR SDRAM AC Timing Characteristics. . . . . .23
5.7.2 DDR SDRAM AC Timing Characteristics . . . . . 25
5.8 General Purpose I/O Timing . . . . . . . . . . . . . . . . . . . . 28
5.9 Reset and Configuration Override Timing . . . . . . . . . . 29
5.10 LCD Controller Timing Specifications . . . . . . . . . . . . . 30
5.11 USB On-The-Go . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.12 ULPI Timing Specification . . . . . . . . . . . . . . . . . . . . . . 33
5.13 SSI Timing Specifications . . . . . . . . . . . . . . . . . . . . . . 33
5.14 I2C Input/Output Timing Specifications . . . . . . . . . . . . 35
5.15 Fast Ethernet AC Timing Specifications . . . . . . . . . . . 37
5.15.1 MII Receive Signal Timing . . . . . . . . . . . . . . . . 37
5.15.2 MII Transmit Signal Timing . . . . . . . . . . . . . . . . 37
5.15.3 MII Async Inputs Signal Timing . . . . . . . . . . . . 38
5.15.4 MII Serial Management Channel Timing . . . . . 38
5.16 32-Bit Timer Module Timing Specifications . . . . . . . . . 39
5.17 QSPI Electrical Specifications . . . . . . . . . . . . . . . . . . . 39
5.18 JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 40
5.19 Debug AC Timing Specifications . . . . . . . . . . . . . . . . . 42
6 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7.1 Package Dimensions—256 MAPBGA . . . . . . . . . . . . . 45
7.2 Package Dimensions—196 MAPBGA . . . . . . . . . . . . . 46
8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
MCF532x ColdFire® Microprocessor Data Sheet, Rev. 5
2 Freescale Semiconductor
