MPC8572E Overview
System Design Information . Document Revision History . 139 NXP reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
MPC8572E Key Features
- Two high-performance, 32-bit, Book E-enhanced cores that implement the Power Architecture® technology
- Each core is identical to the core within the MPC8572E processor
- 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection. Caches can be locked entirely or on a p
- Signal-processing engine (SPE) APU (auxiliary processing unit). Provides an extensive instruction set for vector (64-bit
- 1 2. Electrical Characteristics
- 10 3. Power Characteristics
- 15 4. Input Clocks
- 16 5. RESET Initialization
- 18 6. DDR2 and DDR3 SDRAM Controller
- 19 7. DUART