P3T1750DP Datasheet | NXP Semiconductors

description The P3T1750DP is a temperature-to-digital converter from -40 °C to +125 °C range. It uses an on-chip band gap temperature sensor and A-to-D conversion technique with an overtemperature detection. The device contains a number of configuration and data registers to store the device settings, such as device operation mode, and a temperature register (Temp) to store the digital temp reading that can be municated by a controller via the 2-wire serial I3C (up to 12.5 MHz) and I2C (up to 3.4 MHz) interface. The I2C interface supports up to 32 target addresses and an alert function which bees active when the temperature exceeds the programmed limits. The I3C interface supports IBI (In Band Interrupt) where P3T1750DP emits its address into the arbitrated address header on the I3C bus to notify the controller of an interrupt. It does not require an additional interrupt pin. The P3T1750DP can be configured for different operation conditions. It can be set in normal mode to periodically monitor the ambient temperature, or in shut-down mode to minimize power consumption. The temperature register always stores a 12-bit two's plement data, giving a temperature resolution of 0.0625 °C. The Alert output operates in either of two selectable modes: Alert parator mode or Alert interrupt mode. Its active state can be selected as either HIGH or LOW. The fault queue that defines the number of consecutive faults in order to activate the Alert output is programmable as well as the set-point limits. 2 Features and benefits - I3C (up to 12.5 MHz) and I2C (up to 3.4 MHz) interface - 32 I2C target addresses - 32 I3C Provisional-ID - Supply range: 1.4 V to 3.6 V - Programmable overtemperature alerts - Resolution: 12 bits (0.0625 °C) - Accuracy: - 1.4 V < VCC < 3.6 V - ±1 °C (maximum) from -40 °C to +125 °C - Low quiescent current: 4.1 μA supply current (typical) - ESD protection exceeds 2000 V HBM per JS-001-2017 and 1000 V CDM per JS-002-2018 - Package: TSSOP8 - P3T1750DP/Q900 for...