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PCA9516A - 5-channel I2C hub

General Description

The PCA9516A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems.

Key Features

  • of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling five buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9516A enables the system designer to divide the bus into five segments off of a hub where any segment-to-segment transition sees only one repeater delay. It can also be used to run different buses at 5 V and 3.3 V or 400 kHz and 100 kHz buses w.

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Other Datasheets by NXP Semiconductors

Part Number Description
PCA9516 5-channel I2C hub
PCA9510 Hot swappable I2C and SMBus bus buffer
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PCA9512 Level shifting hot swappable I2C and SMBus buffer
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PCA9516A 5-channel I2C-bus hub Rev. 03 — 23 April 2009 Product data sheet 1. General description The PCA9516A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling five buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9516A enables the system designer to divide the bus into five segments off of a hub where any segment-to-segment transition sees only one repeater delay. It can also be used to run different buses at 5 V and 3.