PCK2057 driver equivalent, 70 - 190 mhz i2c differential 1:10 clock driver.
* Optimized for clock distribution in DDR (Double Data Rate)
SDRAM applications supporting DDR 200/266/300/333
PIN CONFIGURATION
GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GN.
supporting DDR 200/266/300/333
PIN CONFIGURATION
GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 SCL 12.
The PCK2057 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs and one differential pair of feedback clock outputs. The clock outputs ar.
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