Parallel bus to 1 channel Fm+ and 2 channel UFm I2C-bus
Rev. 2 — 1 July 2011
Product data sheet
1. General description
The PCU9669 is an advanced single master mode I2C-bus controller. It is a fourth
generation bus controller designed for data intensive I2C-bus data transfers. It has three
independent I2C-bus channels, one of them with data rates up to 1 Mbits/s using the
Fast-mode Plus (Fm+) open-drain topology and two with a much larger transmit only
transfer rate of up to 5 Mbits/s using the new Ultra Fast-mode (UFm) bus with push-pull
topology. Each channel has a generous 4352 byte data buffer which makes the PCU9669
the ideal companion to any CPU that needs to transmit and receive large amounts of
serial data with minimal interruptions.
The PCU9669 is a 8-bit parallel-bus to I2C-bus protocol converter. It can be configured to
communicate with up to 64 slaves in one serial sequence with no intervention from the
CPU. The controller also has a sequence loop control feature that allows it to
automatically retransmit a stored sequence.
Its onboard oscillator and PLL allow the controller to generate the clocks for the I2C-bus
and for the interval timer used in sequence looping. This feature greatly reduces CPU
overhead when data refresh is required in fault tolerant applications.
An external trigger input allows data synchronization with external events. The trigger
signal controls the rate at which a stored sequence is re-transmitted over the I2C-bus.
Error reporting is handled at the transaction level, channel level, and controller level.
A simple interrupt tree and interrupt masks allow further customization of interrupt
The controller parallel bus interface runs at 3.3 V and the I2C-bus I/Os logic levels are
referenced to a dedicated VDD(IO) input pin with a range of 3.0 V to 5.5 V.
2. Features and benefits
Parallel-bus to I2C-bus protocol converter and interface
5 Mbit/s unidirectional data transfer on Ultra Fast-mode (UFm) channel (push-pull
1 Mbit/s and up to 30 mA SCL/SDA IOL Fast-mode Plus (Fm+) capability
Internal oscillator trimmed to 1 % accuracy reduces external components
Individual 4352-byte buffers for the Fm+ and UFm channels for a total of 13056 bytes
of buffer space
Three levels of reset: individual software channel reset, global software reset, global
hardware RESET pin
Communicates with up to 64 slaves in one serial sequence