SAA7803 Datasheet | NXP Semiconductors

Key Features

• 1 Hardware features s Channel decoder based on SAA7817 IC design s Digital servo based on SAA7824 IC design s 32-bit embedded ARM7 RISC microprocessor supporting both 32-bit and 16-bit Thumb® instruction sets s Mask programmed internal program ROM for microprocessor s Additional memory for code development s Register structure redesigned to utilize the complete 32-bit bandwidth of the integrated microprocessor bus architecture s Programmable clock frequency for ARM® microprocessor - allowing users to trade-off power consumption and processing power depending on requirements s Microprocessor access to digital representations of the diode input signals from the optical pick up; the microprocessor can also generate the servo output signals RA, FO, SL and allows the possibility of additional servo algorithms or a complete servo implementation in software s Microprocessor access to audio streams; both from the internal CD decoder and an external stereo auxiliary input (e.g. an analog source from a tuner; converted to digital via on-chip ADCs) to allow audio processing algorithms in the ARM microprocessor; e.g. bass boost and volume control s Two general purpose analog inputs (A_IN_1 and A_IN_2) allowing the ARM microprocessor access to other external analog signals; e.g. low cost keypad; temperature sensor; via on-chip ADCs s Two analog inputs for external audio sources (e.g. tuner) which can be accessed by the ARM for audio processing DataSheet 4 U .com Philips Semiconductors SAA7803 One chip CD audio device s Slave I2S-bus mode in which the channel decoder can synchronize the CD playback speed to an input I2S-bus clock s Integrated digital HF/mirror detector with measurement of minimum and maximum peak values, amplitude and offset s Integrated LCD controller/driver (pins multiplexed with General Purpose Input/Outputs (GPIOs) s Integrated CD-TEXT decoder s 1 ×, 2 ×, 4 × or 6 × decode speed, CLV or CAV modes s QFP100 package with 0.65 mm pin pitch s Separate left and right channel digital silence detect available on KILL pins s Digital silence detection available on loopback data from external source as well as internal data s ‘Filterless’ pseudo-bitstream audio DAC; THD = -80 dB and S/N = 90 dB; with minimal external components s Separate line and headphone outputs for audio DAC s Selectable quiescent current for headphone buffers - allows users to choose between low-power consumption or lower distortion performance s Loop back mode allowing the use of integrated DAC with external I2S-bus/EIAJ sources s Compatible with voltage mode mechanisms s On-chip buffering and filtering of the diode signals from the mechanism in order to optimize the signals for the decoder and servo parts s LF (servo) signals converted to digital representations by sigma delta ADCs shared between pairs of channels to minimize DC offset between channels s HF part summed from signals D1 to D4 and converted to digital signals by HF 6-bit ADC s Digitally controlled selectable DC offset cancellation of quiescent mechanism voltages and dark currents; additional fine DC offset cancellation in digital domain s Eye pattern monitor system to observe selectable points within the analog preamplifier s Current and average jitter values available via registers s On-chip laser power control; up to maximum currents of 120 mA s Laser on-off control; including ‘soft’ start control - zero to nominal output power in 1 ms s Monitor control and feedback circuit to maintain nominal output power throughout the life of laser s Configured for Nsub monitor diode s JTAG interface for device access and ARM code development (compatible with ARM multi-ICE) s All digital input pins 5 V tolerant.
• 2 Read formats s s s s CD-R CD-RW CD-DA (red book) CD-ROM.