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UJA1066 - High-speed CAN fail-safe system basis chip

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General Description

The UJA1066 fail-safe System Basis Chip (SBC) replaces basic discrete components which are common in every Electronic Control Unit (ECU) with a Controller Area Network (CAN) interface.

The fail-safe SBC supports all networking applications that control various power and sensor peripherals by using high-speed CAN as the main network interface.

The fail-safe SBC contains the following integrated devices: • High-speed CAN transceiver, interoperable and downward compatible with CAN transceiver TJA1041 and TJA1041A, and compatible with the ISO 11898-2 standard and the ISO 11898-5 standard (in preparation) • Advanced independent watchdog • Dedicated voltage regulators for microcontroller and CAN transceiver • Serial peripheral interface (full duplex) • Local wake-up input port • Inhibit/limp-home output port In addition to the advantages of integrating these common ECU functions in a single package, the fail-safe SBC offers an intelligent combination of system-specific functions such as: • Advanced low-power concept • Safe and controlled system start-up behavior • Advanced fail-safe system behavior that prevents any conceivable deadlock • Detailed status reporting on system and subsystem levels The UJA1066 is designed to be used in combination with a microcontroller that incorporates a CAN controller.

Overview

UJA1066 High-speed CAN fail-safe system basis chip Rev.

03 — 17 March 2010 Product data sheet 1.

Key Features

  • 2.1 General.
  • Contains a full set of CAN ECU functions: ‹ CAN transceiver ‹ Voltage regulator for the microcontroller (3.3 V or 5.0 V) ‹ Separate voltage regulator for the CAN transceiver (5 V) ‹ Enhanced window watchdog with on-chip oscillator ‹ Serial Peripheral Interface (SPI) for the microcontroller ‹ ECU power management system ‹ Fully integrated autonomous fail-safe system.
  • Designed for automotive.

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