UJA1066
Description
The UJA1066 fail-safe System Basis Chip (SBC) replaces basic discrete ponents which are mon in every Electronic Control Unit (ECU) with a Controller Area Network (CAN) interface.
Key Features
- Supports remote flash programming via the CAN-bus
- Small 8 mm × 11 mm HTSSOP32 package with low 2.2 CAN transceiver
- ISO 11898-2 and ISO 11898-5 pliant high-speed CAN transceiver
- Enhanced error signalling and reporting
- Partial networking option with global wake-up feature; allows selective CAN-bus munication without waking up sleeping nodes
- Bus connections are truly floating when power is off
- All rights reserved. 2 of 70 NXP Semiconductors UJA1066 High-speed CAN fail-safe system basis chip 2.3 Power management
- Smart operating modes and power management modes
- Cyclic wake-up capability in Standby and Sleep modes
- Local wake-up input with cyclic supply feature
