74HCT4520 Description
74HCT4520 are dual 4-bit internally synchronous binary counters with two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions (nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH.
74HCT4520 Key Features
- plies with JEDEC standard no. 7A
- Input levels
- For 74HC4520: CMOS level
- For 74HCT4520: TTL level
- ESD protection
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- Multiple package options
- Specified from 40 C to +85 C and 40 C to +125 C