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ADC0801S040 Datasheet

Single 8 bits ADC

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ADC0801S040
Single 8 bits ADC, up to 40 MHz
Rev. 02 — 18 August 2008
www.DataSheet4U.com
Product data sheet
1. General description
The ADC0801S040 is an 8-bit universal analog-to-digital converter (ADC) for video and
general purpose applications. It converts the analog input signal from 2.7 V to 5.5 V into
8-bit binary-coded digital words at a maximum sampling rate of 40 MHz. All digital inputs
and outputs are CMOS/Transistor-Transistor Logic (TTL) compatible. A sleep mode allows
reduction of the device power consumption to 4 mW.
2. Features
I 8-bit resolution
I Operation between 2.7 V and 5.5 V
I Sampling rate up to 40 MHz
I DC sampling allowed
I High signal-to-noise ratio over a large analog input frequency range (7.3 effective bits
at 4.43 MHz full-scale input at fclk = 40 MHz)
I CMOS/TTL compatible digital inputs and outputs
I External reference voltage regulator
I Power dissipation only 30 mW (typical value)
I Low analog input capacitance, no buffer amplifier required
I Sleep mode (4 mW)
I No sample-and-hold circuit required
3. Applications
I Video data digitizing
I Camera
I Camcorder
I Radio communication
I Car alarm system


NXP Semiconductors Electronic Components Datasheet

ADC0801S040 Datasheet

Single 8 bits ADC

No Preview Available !

NXP Semiconductors
ADC0801S040
www.DataSheet4U.com
Single 8 bits ADC, up to 40 MHz
4. Quick reference data
Table 1. Quick reference data
VDDA = V5 to V6 = 3.3 V; VDDD = V3 to V4 = 3.3 V; VDDO = V20 to V11 = 3.3 V; VSSA, VSSD and VSSO
shorted together; Vi(a)(p-p) = 1.84 V; CL = 20 pF; Tamb = 0 °C to 70 °C; typical values measured at
Tamb = 25 °C unless otherwise specified.
Symbol Parameter Conditions
Min Typ Max Unit
VDDA
analog supply
voltage
2.7 3.3 5.5 V
VDDD
digital supply
voltage
2.7 3.3 5.5 V
VDDO
output supply
voltage
2.5 3.3 5.5 V
VDD
IDDA
supply voltage
difference
analog supply
current
VDDA VDDD
VDDD VDDO
0.2 -
0.2 -
-4
+0.2
+2.25
6
V
V
mA
IDDD
digital supply
current
- 5 8 mA
IDDO
INL
output supply
current
integral
non-linearity
fclk = 40 MHz; ramp input;
CL = 20 pF
ramp input; see Figure 6
- 1 2 mA
- ±0.5 ±0.75 LSB
DNL
differential
ramp input; see Figure 7
non-linearity
- ±0.25 ±0.5 LSB
fclk(max)
maximum
clock
frequency
40 - - MHz
Ptot
total power
VDDA = VDDD = VDDO = 3.3 V
-
30 53 mW
dissipation
5. Ordering information
Table 2. Ordering information
Type number
Package
Name
ADC0801S040TS
SSOP20
Description
plastic shrink small outline package; 20 leads; body width 4.4 mm
Version
SOT266-1
ADC0801S040_2
Product data sheet
Rev. 02 — 18 August 2008
© NXP B.V. 2008. All rights reserved.
2 of 19


Part Number ADC0801S040
Description Single 8 bits ADC
Maker NXP Semiconductors
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