* I I I I I I SNR, 73 dB SFDR, 90 dBc Sample rate up to 125 Msps Dual-channel14-bit pipelined ADC core Single 3 V supply Flexible input voltage range: 1 V to 2 V (p-p) with 6 dB programmable fine gain I CMOS or LVDS DDR digital outputs I INL ±1 LSB, DNL ±0.5 LSB (typical) I I I I I I Input bandwidth, 6
ADC1412D125 Datasheet (337.27 KB)
ADC1412D125
NXP ↗ Semiconductors
337.27 KB
Dual 14-bit adc.
ADC1412D065/080/105/125 Dual 14-bit ADC 65, 80, 105 or 125 Msps CMOS or LVDS DDR digital outputs Rev. 02 4 June 2009 www.DataSheet4U.com O.
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