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74F574 Datasheet

Octal D-Type Flip-Flop with TRI-STATE Outputs

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May 1995
54F 74F574
Octal D-Type Flip-Flop with TRI-STATE Outputs
General Description
The ’F574 is a high-speed low power octal flip-flop with a
buffered common Clock (CP) and a buffered common Out-
put Enable (OE) The information presented to the D inputs
is stored in the flip-flops on the LOW-to-HIGH Clock (CP)
transition
This device is functionally identical to the ’F374 except for
the pinouts
Features
Y Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
Y Useful as input or output port for microprocessors
Y Functionally identical to ’F374
Y TRI-STATE outputs for bus-oriented applications
Commercial
74F574PC
74F574SC (Note 1)
74F574SJ (Note 1)
Military
54F574DM (Note 2)
54F574FM (Note 2)
54F574LM (Note 2)
Package
Number
N20A
J20A
M20B
M20D
W20A
E20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
IEEE IEC
TL F 9567 – 1
Unit Loading Fan Out
Pin Names
D0 – D7
CP
OE
O0 – O7
Description
Data Inputs
Clock Pulse Input (Active LOW)
TRI-STATE Output Enable Input (Active LOW)
TRI-STATE Outputs
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
150 40 (33 3)
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b3 mA 24 mA (20 mA)
TL F 9567 – 4
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9567
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74F574 Datasheet

Octal D-Type Flip-Flop with TRI-STATE Outputs

No Preview Available !

Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9567–2
Functional Description
The ’F574 consists of eight edge-triggered flip-flops with in-
dividual D-type inputs and TRI-STATE true outputs The
buffered clock and buffered Output Enable are common to
all flip-flops The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold times re-
quirements on the LOW-to-HIGH Clock (CP) transition With
the Output Enable (OE) LOW the contents of the eight flip-
flops are available at the outputs When OE is HIGH the
outputs go to the high impedance state Operation of the
OE input does not affect the state of the flip-flops
Logic Diagram
TL F 9567 – 3
Function Table
Inputs
Internal Outputs
OE CP D
Q
O
Function
H HL
H HH
H LL
H LH
L LL
L LH
L HL
L HH
NC
NC
L
H
L
H
NC
NC
Z Hold
Z Hold
Z Load
Z Load
L Data Available
H Data Available
NC No Change in Data
NC No Change in Data
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Transition
NC e No Change
TL F 9567 – 5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


Part Number 74F574
Description Octal D-Type Flip-Flop with TRI-STATE Outputs
Maker National
Total Page 8 Pages
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