54AC273 Datasheet - National Semiconductor

Octal D Flip-Flop

54AC273 Features

* n n n n n n n n n n Ideal buffer for microprocessor or memory Eight edge-triggered D flip-flops Buffered common clock Buffered, asynchronous master reset See ’377 for clock enable version See ’373 for transparent latch version See ’374 for TRI-STATE ® version Outputs source/sink 24 mA ’ACT has TTL-c

54AC273 General Description

The ’273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-.

54AC273 Datasheet (180.21 KB)

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54AC273

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National Semiconductor

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180.21 KB

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Octal d flip-flop.

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54AC273 Octal Flip-Flop National Semiconductor

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54AC273 Features

54AC273 General Description

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