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National Semiconductor Electronic Components Datasheet

54AC280 Datasheet

9-Bit Parity Generator/Checker

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September 1998
54AC280
9-Bit Parity Generator/Checker
General Description
The ’AC280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an even
or an odd number of these inputs is HIGH. If an even number
of inputs is HIGH, the Sum Even output is HIGH. If an odd
number is HIGH, the Sum Even output is LOW. The Sum
Odd output is the complement of the Sum Even output.
Features
n ICC reduced by 50%
n 9-bit width for memory applications
n Standard Microcircuit Drawing (SMD) 5962-92201
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP and Flatpak
IEEE/IEC
DS100359-1
DS100359-2
Pin Assignment for LCC
Pin
Names
I0– I8
O
E
Description
DS100359-4
Data Inputs
Odd Parity Output
Even Parity Output
Truth Table
Number of
HIGH Inputs
I0– I8
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H = HIGH Voltage Level
L = LOW Voltage Level
DS100359-3
Outputs
Even
Odd
HL
LH
FACTis a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100359
www.national.com


National Semiconductor Electronic Components Datasheet

54AC280 Datasheet

9-Bit Parity Generator/Checker

No Preview Available !

Logic Diagram
DS100359-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com
2


Part Number 54AC280
Description 9-Bit Parity Generator/Checker
Maker National Semiconductor
Total Page 6 Pages
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