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National Semiconductor Electronic Components Datasheet

54ACT109 Datasheet

Dual JK Positive Edge-Triggered Flip-Flop

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August 1998
54AC109 54ACT109
Dual JK Positive Edge-Triggered Flip-Flop
General Description
The ’AC/’ACT109 consists of two high-speed completely in-
dependent transition clocked JK flip-flops. The clocking op-
eration is independent of rise and fall times of the clock
waveform. The JK design allows operation as a D flip-flop
(refer to ’AC/’ACT74 data sheet) by connecting the J and K
inputs together.
Asynchronous Inputs:
LOW input to SD (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes both Q and Q
HIGH
Features
n ICC reduced by 50%
n Outputs source/sink 24 mA
n ’ACT109 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’AC109: 5962-89551
— ’ACT109: 5962-88534
Logic Symbol
IEEE/IEC
DS100267-1
DS100267-2
DS100267-7
Pin Names
J1, J2, K1, K2
CP1, CP2
CD1, CD2
SD1, SD2
Q1, Q2, Q1, Q2
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100267
www.national.com


National Semiconductor Electronic Components Datasheet

54ACT109 Datasheet

Dual JK Positive Edge-Triggered Flip-Flop

No Preview Available !

Connection Diagrams
Pin Assignment
for DIP and Flatpak
DS100267-3
Truth Table
(each half)
Inputs
Outputs
SD CD CP J K
L H X XX
Q
H
Q
L
H L X XX L H
L L X XX H H
H H NLL L H
H H NHL
Toggle
H H N L H Q0 Q0
H H NHH H L
H H L X X Q0 Q0
H = HIGH Voltage Level
L = LOW Voltage Level
N = LOW-to-HIGH Transition
X = Immaterial
Q0(Q0) = Previous Q0 (Q0) before LOW-to-HIGH Transition of Clock
Logic Diagram (one half shown)
Pin Assignment
for LCC
DS100267-4
DS100267-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com
2


Part Number 54ACT109
Description Dual JK Positive Edge-Triggered Flip-Flop
Maker National Semiconductor
Total Page 8 Pages
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