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54ACT175 - Quad D Flip-Flop

Download the 54ACT175 datasheet PDF. This datasheet also covers the 54AC175 variant, as both devices belong to the same quad d flip-flop family and are provided as variant models within a single manufacturer datasheet.

Description

The ’AC/’ACT175 is a high-speed quad D flip-flop.

The device is useful for general flip-flop requirements where clock and clear inputs are common.

The information on the D inputs is stored during the LOW-to-HIGH clock transition.

Features

  • n Edge-triggered D-type inputs Logic Symbols Connection Diagrams Pin Assignment for DIP and Flatpak DS100278-1 IEEE/IEC DS100278-3 Pin Assignment for LCC DS100278-2 Pin Names D0.
  • D3 CP MR Q0.
  • Q3 Q0.
  • Q3.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (54AC175_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
54ACT175 Quad D Flip-Flop Texas Instruments
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54ACT11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Texas Instruments
54ACT11010 Triple 3-Input Positive-NAND Gates Texas Instruments
54ACT11011 TRIPLE 3-INPUT POSITIVE-AND GATES Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
54ACT174 Hex D Flip-Flop
54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
54ACT112 Dual JK Negative Edge-Triggered Flip-Flop
54ACT138 1-of-8 Decoder/Demultiplexer
54ACT139 Dual 1-of-4 Decoder/Demultiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 54AC175 • 54ACT175 Quad D Flip-Flop August 1998 54AC175 • 54ACT175 Quad D Flip-Flop General Description The ’AC/’ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW-to-HIGH clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW.
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