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National Semiconductor Electronic Components Datasheet

54ACT258 Datasheet

Quad 2-Input Multiplexer

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August 1998
54AC258 54ACT258
Quad 2-Input Multiplexer with TRI-STATE® Outputs
General Description
The ’AC/’ACT258 is a quad 2-input multiplexer with
TRI-STATE outputs. Four bits of data from two sources can
be selected using a common data select input. The four out-
puts present the selected data in the complement (inverted)
form. The outputs may be switched to a high impedance
state with a HIGH on the common Output Enable (OE) input,
allowing the outputs to interface directly with bus-oriented
systems.
n Multiplexer expansion by tying outputs together
n Inverting TRI-STATE outputs
n Outputs source/sink 24 mA
n ’ACT258 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’ACT258: 5962-88704
— ’AC258: 5962-91604
Features
n ICC and IOZ reduced by 50%
Logic Symbols
IEEE/IEC
DS100287-1
Pin Names
S
OE
I0a– I0d
I1a– I1d
Za– Zd
Description
Common Data Select Input
TRI-STATE Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Inverting Data Outputs
DS100287-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100287
www.national.com


National Semiconductor Electronic Components Datasheet

54ACT258 Datasheet

Quad 2-Input Multiplexer

No Preview Available !

Connection Diagrams
Pin Assignment
for DIP and Flatpak
DS100287-3
Pin Assignment
for LCC
DS100287-4
Functional Description
The ’AC/’ACT258 is a quad 2-input multiplexer with
TRI-STATE outputs. It selects four bits of data from two
sources under control of a common Select input (S). When
the Select input is LOW, the I0x inputs are selected and when
Select is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in inverted form. The
’AC/’ACT258 is the logic implementation of a 4-pole,
2-position switch where the position of the switch is deter-
mined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Za = OE (I1a S + I0a S)
Zb = OE (I1b S + I0b S)
Zc = OE (I1c S + I0c S)
Zd = OE (I1d S + I0d S)
When the Output Enable input (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs of the
TRI-STATE devices are tied together, all but one device must
be in the high impedance state to avoid high currents that
would exceed the maximum ratings. Designers should en-
sure that Output Enable signals to TRI-STATE devices
whose outputs are tied together are designed so there is no
overlap.
Truth Table
Output
Select
Enable
Input
OE S
HX
LH
LH
LL
LL
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Data
Inputs
I0 I1
XX
XL
XH
LX
HX
Outputs
Z
Z
H
L
H
L
www.national.com
2


Part Number 54ACT258
Description Quad 2-Input Multiplexer
Maker National Semiconductor
Total Page 8 Pages
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